Methods of fabrication of package assemblies for optically interactive electronic devices and package assemblies therefor

ABSTRACT

Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a divisional of U.S. application Ser. No.13/212,579, which was filed on Aug. 18, 2011, which is scheduled toissue on Apr. 23, 2013 as U.S. Pat. No. 8,426,954, which is a divisionalof U.S. application Ser. No. 11/646,991, which was filed on Dec. 28,2006, which is scheduled to issue on Aug. 30, 2011, as U.S. Pat. No.8,008,762, which is a continuation of U.S. application Ser. No.11/118,498, which was filed on Apr. 29, 2005, which issued on Jan. 30,2007 as U.S. Pat. No. 7,169,645, which is a divisional of U.S.application Ser. No. 10/664,845, filed Sep. 17, 2003, which issued onFeb. 7, 2006 as U.S. Pat. No. 6,995,462, the disclosure of which isincorporated herein by reference.

The present invention relates to packaging for optically interactiveelectronic devices. More particularly, the present invention relates topackage assemblies for solid-state image sensors wherein a transparentcover is adhesively attached over the active surface of an image sensorchip and the image sensor chip is sealed within an encapsulant. Thepresent invention also relates to methods of fabricating the imagesensor package assemblies in an efficient manner to eliminate or reducethe potential for deposition of contaminants on the image sensor chipactive surface during the fabrication process.

Optically interactive electronic devices, for example, charge coupleddevice (CCD) image sensors or complementary metal-oxide semiconductor(CMOS) image sensors, are typically enclosed within a package forsubsequent connection to higher-level packaging such as a larger circuitassembly in the form of a carrier substrate. The package provideselectrical interconnection to the larger circuit assembly, providesprotection from the surrounding environment and allows light or otherforms of radiation to pass through to sensing circuitry located on theimage sensor device. In the prior art, package formation has often beenaccomplished by placing an image sensor device in the form of asemiconductor chip into the cavity of a plastic or ceramic housing, wirebonding electrical connection points on the semiconductor chip toconductive pads associated with the housing and sealing a window ortransparent cover over the cavity. The materials and structure involvedwith this packaging technique require a fabrication process that can betime consuming and requires several precision assembly steps. Further,each assembly step increases the opportunity for contamination or damageto the image sensor device itself, raising defect levels and slowingproduction time to avoid such damage and contamination. Due to theextremely cost-competitive nature of today's semiconductor industry,even small improvements in product yield and production time are ofvalue, especially when considered in terms of the high volume ofcomponents being manufactured.

In response to large-scale production requirements, various attemptshave been made to simplify the construction of image sensor packaging.U.S. Pat. No. 6,351,027 to Giboney et al. and U.S. Pat. No. 6,285,064 toFoster, for instance, disclose wafer-level packaging formed by laying asolid sidewall piece or an adhesive matrix over a wafer having an arrayof sensor devices and covering it with one or more transparent toppieces. The wafer is then singulated to create discrete chip-scalepackages. While these packaging techniques reduce material costs andassembly steps, they do not completely protect the semiconductor chipsfrom the environment and may require complicated process steps forforming electrical connections to the sensor devices. U.S. Pat. No.6,266,197 to Glenn et al. discloses a method for forming image sensorpackages wherein an array of image sensors is wire bonded to a carriersubstrate, and a molded window array is placed over the array of imagesensors. The substrate and attached molded window array are thensingulated to form a plurality of individual image sensor packages. Themolded window array of Glenn et al., however, suffers from the fact thatindividual transparent windows must be formed within, or later attachedto the molded array, requiring additional assembly and alignment stepsduring fabrication. U.S. Pat. No. 5,811,799 to Wu discloses an imagesensor package formed by attaching a plurality of preformed or gluewalls to an array of printed wiring frames having image sensors thereonand sealing the walls with transparent material. The printed wiringframes are then diced to form discrete packages. Once again, thisarrangement may require the attachment or formation of multiplecomponents during fabrication and may increase the occurrence of processcontamination.

As is evident from the foregoing description of the state of the art, asimplified method is needed for forming an image sensor package that isconducive to mass production while still offering suitable and robustmechanical and environmental protection for an image sensor chip.

BACKGROUND OF THE INVENTION

In accordance with the present invention, a plurality of packageassemblies for image sensors and other optically interactive electronicdevices are simultaneously fabricated to minimize process steps andreduce the cost associated with each individual package. The methods offabrication also reduce the possibility of contaminants being depositedon the active surface of a device during assembly. While the followingexemplary packaging embodiments are depicted in terms of image sensorchips, it should be understood that the package assemblies and methodspresented herein would work equally well for enclosing other types ofoptically interactive electronic devices. The term “opticallyinteractive” as used herein is meant to encompass devices sensitive tovarious wavelengths of light or other forms of radiation, including, butnot limited to, CCD and CMOS image sensors, EPROMs, and photodiodes, aswell as light-emitting devices including semiconductor lasers andlight-emitting diodes.

In a first embodiment according to the present invention, a wafer ofsemiconductor material is provided containing a plurality of imagesensor chips with active surfaces arranged in an array on the front sideof the wafer. The active surface of each image sensor chip includes animage sensitive area and bond pads for providing electrical connectionto internal circuitry of the image sensor chip. A transparent cover of asize sufficient to cover the array of image sensor chip active surfacesis attached to the front side of the wafer using an adhesive material.The adhesive material is formed in a pattern such that, when thetransparent cover is attached, the adhesive material lies between thebond pads and the image sensitive area on the active surface of eachimage sensor chip. The pattern of adhesive material may be applied tothe front side of the wafer and/or to the transparent cover.

Once the wafer and transparent cover are joined, a layer ofsemiconductor material is removed from the back side of the wafer bybackgrinding to reduce the image sensor chips to a desired thickness. Adicing or singulating operation is then carried out to separate theimage sensor chips from the wafer. In a first stage of the dicingoperation, the transparent cover is cut along the edge of the pattern ofadhesive material surrounding the image sensitive area on the activesurface of each image sensor chip. The bond pads on the active surfaceof each image sensor chip are thus left exposed for further processing,while the image sensitive area of the active surface is sealed by theremaining portion of the transparent cover. In a second stage of thedicing operation, the wafer is cut along streets of semiconductormaterial located between adjacent image sensor chips for completeseparation.

Each individual image sensor chip is subsequently affixed to aninterposer substrate having conductive traces. The conductive tracesextend from attachment pads formed on a first surface of the interposerto which the image sensor chips are attached, to external connectionpoints on a second, opposing surface of the interposer. Wire bonds areformed to electrically connect the image sensor chip bond pads with theinterposer attachment pads. A layer of encapsulant material is thenformed over the first surface of the interposer to cover the wire bondlocations and surround the edges of the transparent cover attached toeach image sensor chip. Discrete conductive elements such as solderballs are formed on, or attached to the external connection points ofthe interposer, and the interposer is singulated to provide individualimage sensor package assemblies.

In a second embodiment according to the present invention, image sensorpackage assemblies are formed as in the first embodiment, but the imagesensor chips are not connected to the interposer attachment pads usingwire bonds. Instead, the image sensor chips include back side conductiveelements configured for direct connection to the interposer attachmentpads. In one variant of the second embodiment, the image sensor chipsinclude conductive vias extending from the image sensor chip activesurfaces into the wafer semiconductor material. The vias are exposedthrough the back side of the wafer during the backgrinding process andconductive elements such as bumps or pads are formed over the vias onthe back side of the wafer. The back side conductive elements may thenbe directly connected to the interposer attachment pads. In anothervariant of the second embodiment, after separating the image sensorchips from the wafer, a redistribution layer (RDL) may be formed on eachimage sensor chip to provide conductive traces extending from the bondpads to the edge of the active surface and down to the back side of theimage sensor chip. Conductive bumps or pads may then be formed on theRDL traces at locations configured for direct connection to theinterposer attachment pads.

In a third embodiment according to the present invention, thetransparent cover is not attached to the image sensor chips at the waferlevel. Instead, after dicing the wafer, the individual image sensorchips are affixed to the interposer and electrically connected to theinterposer attachment pads. Individual transparent covers are attachedto each of the image sensor chips with an adhesive material. Theformation of the layer of encapsulant material, discrete conductiveelements and singulation of the interposer are then carried out as inthe first embodiment. The third embodiment enables the transparent coverto overlie the entire active surface of an image sensor chip and alsoallows the adhesive material to be placed directly over any wire bondconnections.

In a fourth embodiment according to the present invention, image sensorpackage assemblies are formed by mounting individual image sensor chipswithin the cavity of a preformed leadless chip carrier (LCC). In onevariant of the fourth embodiment, individual image sensor chips havingtransparent covers are affixed to an interposer substrate as in thefirst through third embodiments. Discrete conductive elements areincluded on the external connection points of the interposer; however,the interposer is singulated without adding a layer of encapsulantmaterial to form a packaging subassembly. The packaging subassembly isthen mounted within the cavity of an LCC, and the cavity is filled witha liquid sealant that covers the packaging subassembly and surrounds theedges of the transparent cover attached to each image sensor chip. Inanother variant of the fourth embodiment individual image sensor chipsare formed with transparent covers as in the first through thirdembodiments, and are affixed directly to the bottom of the LCC cavitysuch that the LCC itself is the interposer substrate. The cavity isfilled with a liquid sealant that covers the packaging subassembly andsurrounds the edges of the transparent cover attached to each imagesensor chip.

Other and further features and advantages of the present invention willbe apparent from the following descriptions of the various embodimentswhen read in conjunction with the accompanying drawings. It will beunderstood by one of ordinary skill in the art that the followingembodiments are provided for illustrative and exemplary purposes only,and that numerous combinations of the elements of the variousembodiments of the present invention are possible.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A is a top view of a semiconductor wafer containing an array ofimage sensor chips;

FIG. 1B is a sectional side view taken along line 1B-1B in FIG. 1A;

FIG. 2 is a top view of a transparent cover having a pattern of adhesivematerial applied thereto;

FIG. 3 is a top view of the semiconductor wafer in FIG. 1A having apattern of adhesive material applied thereto;

FIG. 4A is a sectional side view of adhesive material positioned betweenbond pads and an image sensitive area of an image sensor chip;

FIG. 4B is a sectional side view of adhesive material covering bond padsaround an image sensitive area of an image sensor chip;

FIG. 5 is a schematic representation of a backgrinding process;

FIG. 6A is a top view of a semiconductor wafer;

FIG. 6B is a sectional side view taken along line 6B-6B in FIG. 6A;

FIGS. 7A and 7B are sectional side views showing an alternative firststage of the wafer dicing operation;

FIG. 8 is a sectional side view showing a second stage of the waferdicing operation;

FIG. 9 is a sectional side view showing image sensor chips attached toan interposer according to a first embodiment of the present invention;

FIG. 10 is a sectional side view showing a layer of encapsulant formedon the interposer of FIG. 9;

FIG. 11 is a sectional side view of image sensor package assembliesaccording to the first embodiment of the present invention;

FIGS. 12-15 are sectional side views of the formation of image sensorpackage assemblies according to a variant of a second embodiment of thepresent invention;

FIGS. 16-17 are sectional side views of the formation of image sensorpackage assemblies according to another variant of the second embodimentof the present invention;

FIGS. 18 and 19 are sectional side views of the formation of imagesensor package assemblies according to a third embodiment of the presentinvention;

FIG. 20 is a sectional side view of a preformed leadless chip carrierused in a fourth embodiment of the present invention;

FIGS. 21A-21C show image sensor package subassemblies affixed to theleadless chip carrier in a variant of the fourth embodiment of thepresent invention; and

FIGS. 22A-22C show image sensor chips with attached transparent coversaffixed directly to the leadless chip carrier in another variant of thefourth embodiment of the present invention.

DETAILED DESCRIPTION

Referring in general to the accompanying drawings, various aspects ofthe present invention are illustrated to show exemplary image sensorpackage assemblies as well as methods for their construction. Commonelements of the illustrated embodiments are designated with likereference numerals for clarity. It should be understood that the figurespresented are not meant to be illustrative of actual views of anyparticular portion of a particular image sensor assembly, but are merelyidealized schematic representations which are employed to more clearlyand fully depict the invention. It should further be understood thatwhile depicted in terms of image sensors, the package embodiments andmethods presented herein would work equally well for housing other typesof optically interactive electronic devices as described above.

The formation of image sensor package assemblies according to a firstembodiment of the present invention is illustrated by FIGS. 1A-11. InFIG. 1A, an exemplary wafer 2 of semiconductor material is providedcontaining a plurality of image sensor chips 4. It should be noted thatthe present invention is applicable to bulk semiconductor substratesother than traditional wafers, and the term “wafer” as employed hereinencompasses such other substrates. The outer edges 6 of image sensorchips 4, schematically depicted by section lines, are defined alongstreets 8 of semiconductor material located between adjacent imagesensor chips 4. Each image sensor chip 4 includes an active surface 10having an image sensitive area 12 and bond pads 14. Image sensitive area12 comprises sensing circuitry reactive to light or other forms ofradiation. FIG. 1B is an enlarged cross section of wafer 2 taken alongline 1B-1B in FIG. 1A. As can be seen in FIG. 1B, wafer 2 has a frontside 16 and an opposing back side 18, with bond pads 14 beingperipherally spaced around image sensitive area 12 on the front side 16of wafer 2. While bond pads 14 are depicted in a single row along eachof the four sides of image sensitive area 12, other arrangements arepossible, for example and not by way of limitation, having bond pads 14formed along fewer sides or in multiple rows along one or more sides.For certain types of image sensors, FIG. 1B shows that image sensitivearea 12 may also comprise microlenses 20 formed over the sensingcircuitry to aid in the reception of light.

Turning to FIGS. 2-4B, a transparent cover 22 of a size sufficient tocover the array of image sensor chip active surfaces 10 is attached tothe front side 16 of wafer 2 using an adhesive material 24. Transparentcover 22 may be formed of an at least partially optically transparentmaterial such as borosilicate glass (BSG). Other types of glass, quartzor even plastic of suitable material characteristics and which allow thepassage of a desired range of wavelengths of light or other forms ofelectromagnetic radiation may also be used. Furthermore, portions oftransparent cover 22 may be formed to provide an optical function, forexample, by shaping its surface at locations corresponding to imagesensitive areas 12 to act as a focusing lens. FIG. 2 shows adhesivematerial 24 applied to transparent cover 22 in a pattern thatcorresponds to the periphery of the image sensitive area 12 of eachimage sensor chip 4. FIG. 3 shows that the pattern of adhesive material24 may instead, or in addition, be applied directly to the front side 16of wafer 2. Adhesive material 24 may be in the form of an epoxy, asilicone, an acrylic or other liquid-type adhesive applied totransparent cover 22 and/or the front side 16 of wafer 2, or maycomprise a double-sided adhesive-coated tape segment or film, such as apolyimide. Alternatively, a two-component resin may be employed, withone component applied in an appropriate pattern to transparent cover 22and the other to front side 16 of wafer 2 to prevent premature componentreaction and adhesion.

FIG. 4A, which is a sectional side view of wafer 2, shows that whentransparent cover 22 is attached, adhesive material 24 lies between bondpads 14 and image sensitive area 12 of the active surface 10 of eachimage sensor chip 4 (FIG. 3). FIG. 4A also shows that in the case whereimage sensitive area 12 includes microlenses 20, adhesive material 24 isformed to have a thickness providing a standoff space betweenmicrolenses 20 and transparent cover 22. This avoids undesirablerefraction or other optical variations that may result from contactbetween microlenses 20 and transparent cover 22. In some cases, it maybe desirable to apply adhesive material 24 in a pattern that also coversbond pads 14 in order to provide protection during subsequentprocessing, as will be described in further detail below. FIG. 4B showsa sectional side view of wafer 2 with bond pads 14 covered by adhesivematerial 24.

Once transparent cover 22 has been joined with wafer 2, a layer ofsemiconductor material is removed from the back side 18 of wafer 2 usinga backgrinding process. Reducing the thickness of wafer 2 in this mannerminimizes the final package size (thickness) and reduces the time andexpense associated with cutting wafer 2 during the subsequent dicingoperation. Furthermore, backgrinding removes undesirable contaminantswhich may have been introduced into the back side of wafer 2 duringfabrication. FIG. 5 is a schematic representation of the backgrindingprocess wherein a grinding wheel 26 is applied to the back side 18 ofwafer 2. As can be seen in FIG. 5, the prior attachment of transparentcover 22 shields the front side 16 of wafer 2, thereby eliminating thepotential for contamination from particles generated during backgrindingthat might otherwise be deposited on image sensitive areas 12.

After backgrinding wafer 2 to the desired thickness, a dicing operationis carried out to separate image sensor chips 4 from wafer 2. In a firststage of the dicing operation shown in FIG. 6A, transparent cover 22 iscut along the edge of the pattern of adhesive material 24 surroundingthe image sensitive area 12 of each image sensor chip 4. FIG. 6B, whichis an enlarged cross section of wafer 2 taken along line 6B-6B in FIG.6A, shows that the bond pads 14 of each image sensor chip 4 (FIG. 1A)are left exposed for receiving electrical connections, while imagesensitive area 12 is sealed by the remaining portion of transparentcover 22 overlying adhesive material 24. Cutting of transparent cover 22may be accomplished, by way of example, using a saw blade (not shown)having a width that is equal to the distance 28 between adjacent edgesof adhesive material 24 surrounding each image sensitive area 12. Inthis manner, the entire portion of transparent cover 22 between adjacentimage sensitive areas 12 may be removed by a single saw pass along astreet 8. A narrower saw blade may also be used, with two saw passesbeing made to expose bond pads 14.

FIGS. 7A and 7B show an alternative to the first stage of the dicingoperation where adhesive material 24 has been formed in a patterncovering bond pads 14, as previously depicted in FIG. 4B. In FIG. 7A,transparent cover 22 is cut with a narrow saw blade (not shown) down themiddle of street 8. An etching process is then carried out to remove theportions of transparent cover 22 and adhesive material 24 covering bondpads 14, as seen in FIG. 7B. Using this alternative process protectsbond pads 14 and prevents the deposition of contaminants while cuttingtransparent cover 22.

In a second stage of the dicing operation shown in FIG. 8, wafer 2 iscut along streets 8 (FIG. 7A) of semiconductor material at the outeredges 6 of image sensors chips 4 for complete separation of wafer 2 intoindividual image sensor chips 4. Any conventional process for cuttingwafer 2 may be used, such as with a dicing saw. FIG. 8 shows that eachindividual image sensor chip 4 includes an image sensitive area 12sealed by a remaining portion of transparent cover 22, as well as bondpads 14 left exposed for later electrical connection.

In the next stage of package formation according to the firstembodiment, FIG. 9 shows that each individual image sensor chip 4 isaffixed to an interposer 30. Interposer 30 includes conductive pathways32 extending from attachment pads on a first surface 36 of interposer30, to external connection points 38 on a second, opposing surface 40 ofinterposer 30. Image sensor chips 4 may be adhesively mounted to thefirst surface 36 of interposer 30 with an adhesive element comprising alayer of adhesive 42 such as an epoxy or by an adhesive-coated tape in alamination process as known in the art. Wire bonds 44 are then formed toelectrically connect the image sensor chip bond pads 14 with theattachment pads 34 of interposer 30. As can be seen in FIG. 9, the firstembodiment of the present invention enables the wire bonding process tobe carried out while image sensitive area 12 is sealed under transparentcover 22.

FIG. 10 shows that after the wire bonding process is complete, a layerof encapsulant material 46 is formed over the first surface 36 ofinterposer 30 to cover wire bonds 44 and surround the edges of theportion of transparent cover 22 attached to each image sensor chip 4.Encapsulant material 46 may comprise any conventional compound known foruse in encapsulating semiconductor chips that exhibits low moistureuptake and good dimensional stability. Encapsulant material 46 shouldalso be selected to have a coefficient of thermal expansion (CTE) thatis compatible with those of interposer 30 and image sensor chips 4.Examples of encapsulant material 46 contemplated for use in the presentinvention include, but are not limited to, thermoset or thermoplasticcurable compounds such as silicon-filled polymers or liquid crystalpolymers. The layer of encapsulant material 46 may be formed oninterposer 30 by known transfer molding, pot molding or injectionmolding, by liquid dispensing, by photolithographic orstereolithographic deposition processes, or as otherwise known in theart.

Discrete conductive elements 48 such as solder balls are formed on, orattached to the external connection points of interposer 30 in order tofacilitate subsequent attachment to a carrier substrate or otherhigher-level circuit assembly. While FIG. 10 shows discrete conductiveelements 48 as comprising solder balls, it should be understood thatbumps of conductive or conductor-filled epoxy or even pads comprisingone or more layers of metallic plating may be formed on externalconnection points 38.

After forming discrete conductive elements 48, FIG. shows thatinterposer 30 and the layer of encapsulant material 46 are cut alonglines extending between adjacent image sensor chips 4 to provideindividual image sensor package assemblies 50. This may be accomplished,for example, by cutting or scribing (followed by snapping image sensorpackage assemblies 50 apart along the scribe lines) with a conventionaldicing saw. Alternatively, the individual image sensor packageassemblies 50 may be singulated using a laser or other high energy beam.

Image sensor package assemblies 50 according to a second embodiment ofthe present invention are formed in a manner similar to that of thefirst embodiment, except image sensor chips 4 are not connected to theinterposer attachment pads 34 using wire bonds 44. Instead, the imagesensor chips 4 are formed to include back side conductive elementsconfigured for direct connection to attachment pads 34.

One variant of the second embodiment is shown in FIGS. 12-15. FIG. 12shows that the image sensor chips 4 include conductive vias 52 extendingfrom bond pads 14 on the image sensor chip active surfaces 10 into thesemiconductor material of wafer 2. Because bond pads 14 do not need tobe exposed for wire bonding, transparent cover 22 is joined to the frontside 16 of wafer 2 by a pattern of adhesive material 24 that covers bondpads 14 in the same manner as depicted in FIG. 4B of the firstembodiment. This enables adhesive material 24 to seal the entire activesurface 10 of an image sensor chip 4 in the area surrounding imagesensitive area 12. FIG. 13 shows that vias 52 are exposed through theback side 18 of wafer 2 during the backgrinding process, and back sideconductive elements such as bumps 54 are then formed over vias on theback side 18 of the wafer 2. As with discrete conductive elements 48,conductive bumps 54 may comprise solder, conductive or conductor-filledepoxy, metallic plating, or any other conductive material known for usein forming external conductive elements on semiconductor chips.

In FIG. 14, wafer 2 and transparent cover 22 are simultaneously cutalong streets 8 (FIG. 1A) at the outer edges 6 of image sensor chips 4.Cutting wafer 2 and transparent cover 22 may be carried out in a singlepass because bond pads 14 do not require exposure for wire bonding.Therefore, the portion of transparent cover 22 remaining on an imagesensor chip 4 after cutting may cover the entire active surface 10. FIG.15 shows that once cutting is completed, each individual image sensorchip 4 is affixed to interposer 30 by bonding conductive bumps 54directly to attachment pads 34. Formation of the layer of encapsulantmaterial 46, addition of discrete conductive elements 48, and cuttinginto individual image sensor package assemblies 50 may then be carriedout in the same manner as described in the first embodiment of thepresent invention.

In another variant of the second embodiment, image sensor packageformation is carried out in the same manner as in the first embodimentup through the dicing operation, described with respect to FIGS. 6A-8.According to this variant of the second embodiment, FIG. 16 shows thatafter separating the image sensor chips 4 from wafer 2, a redistributionlayer (RDL) may be provided on each image sensor chip 4 in the form ofconductive traces 56 extending from bond pads 14 to the edge of theactive surface 10 and down to back side 18. Conductive traces 56 of theRDL may be formed with conventional processes such as by depositing ametallic layer onto the surfaces of image sensor chips 4 by sputteringor chemical vapor deposition (CVD) and then masking and etching themetallic layer to form individual traces. Alternatively, conductivetraces 56 may be formed as a TAB-type assembly of preformed tracescarried on a polymer film which are bonded to bond pads 14 andadhesively affixed to an image sensor chip 4 to extend around sidesthereof and down to back side 18.

FIG. 17 shows that once conductive traces 56 are formed, back sideconductive elements such as conductive bumps may be formed on conductivetraces 56 and directly connected to the attachment pads 34 of interposer30, as in the first variant of the second embodiment. Formation of thelayer of encapsulant material 46, addition of discrete conductiveelements 48, and cutting into individual image sensor package assemblies50 may then be carried out in the same manner as described in the firstembodiment of the present invention.

A third embodiment of the present invention is shown in FIGS. 18 and 19.According to the third embodiment, transparent cover 22 is not attachedto the image sensor chips 4 at the wafer level. Instead, wafer 2 isinitially diced into individual image sensor chips 4, and image sensorchips 4 are affixed to interposer 30 with adhesive layer 42 in anuncovered condition, as seen in FIG. 18. Wire bonds 44 are then formedto electrically connect the image sensor chip bond pads 14 with theattachment pads 34 of interposer 30. FIG. 19 shows that individualtransparent covers 22′ are subsequently attached to each of the imagesensor chips 4 with adhesive material 24. Because wire bonds 44 areformed prior to attaching individual transparent covers 22′, adhesivematerial 24 may be placed directly over the attachment point of wirebonds 44 and bond pads 14, thereby sealing the entire active surface 10of an image sensor chip 4 in the area surrounding image sensitive area12. This arrangement also allows individual transparent covers 22′ tocover the entirety of active surface 10, which provides protectionduring subsequent processing. Formation of the layer of encapsulantmaterial 46, addition of discrete conductive elements 48, and cuttinginto individual image sensor package assemblies 50 may then be carriedout in the same manner as described in the first embodiment of thepresent invention.

In a fourth embodiment of the present invention, image sensor packageassemblies are formed by mounting individual image sensor chips withinthe cavity of a preformed semiconductor package housing such as aleadless chip carrier (LCC). This enables a completed image sensorpackage assembly, according to the present invention, to be attached toa carrier substrate or other higher-level circuit assembly at anattachment location configured with a standard package footprint. FIG.20 shows an exemplary preformed package housing comprising a LCC 58 foruse with image sensor package assemblies according to the fourthembodiment of the present invention. LCC 58 includes a body 60 ofceramic, plastic, or other conventional LCC package materials, and achip cavity 62. Conductive pathways 64 extend from attachment pads 66within chip cavity 60 to solder pads 68 formed about the exteriorperimeter of body 60.

In one variant of the fourth embodiment, individual image sensor chips 4having transparent covers 22 or 22′ are formed and affixed to interposer30 as in the first through third embodiments. Discrete conductiveelements 48 are likewise added to the external connection points 38 ofinterposer 30. Rather than forming a layer of encapsulant material 46 oninterposer 30, as in the first through third embodiments, interposer 30is singulated to form a packaging subassembly, which is mounted withinchip cavity 62 of LCC 58 by bonding discrete conductive elements 48 toattachment pads 66, as seen in FIGS. 21A-21C. FIG. 21A shows a packagingsubassembly 70 mounted within chip cavity 62, wherein image sensor chip4 and transparent cover 22 have been formed and affixed to interposer 30as in the first embodiment. FIG. 21B shows a packaging subassembly 72mounted within chip cavity 62, wherein image sensor chip 4 andtransparent cover 22 have been formed and affixed to interposer 30 as inthe second embodiment. FIG. 21C shows a packaging subassembly 74 mountedwithin chip cavity 62, wherein image sensor chip 4 and individualtransparent cover 22′ have been formed and affixed to interposer 30 asin the third embodiment. FIGS. 21A-21C show that to complete the imagesensor chip package assembly 50, chip cavity 62 is then filled with aliquid sealant 76 that covers the packaging subassemblies 70, 72, or 74and surrounds the edges of the transparent covers 22 or 22′ attached toeach image sensor chip 4. Liquid sealant 76 may be a curable polymercompound, such as an epoxy, resin or molding compound, or any otherliquid sealant material known for use in sealing semiconductorpackaging.

Another variant of the fourth embodiment is shown in FIGS. 22A-22C.Under this approach, individual image sensor chips 4 are formed withtransparent covers 22 or 22′ as in the first through third embodiments,but are not affixed to interposer 30. Instead, they are affixed directlyto the bottom of the LCC 58 chip cavity 62 and electrically connected toattachment pads 66 such that LCC 58 itself provides the interposersubstrate, as seen in FIGS. 22A-22C. FIG. 22A shows that an image sensorchip 4 with transparent cover 22, attached as in the first embodiment,is affixed to the bottom of chip cavity 62 with adhesive layer 42 andwire bonds 44 formed between bond pads 14 and attachment pads 66. FIG.22B shows that an image sensor chip 4 with transparent cover 22,attached as in the second embodiment, is affixed to the bottom of chipcavity 62 by bonding back side conductive elements such as conductivebumps 54 directly to attachment pads 66. FIG. 22C shows that an imagesensor chip 4 with individual transparent cover 22′, attached as in thethird embodiment, is affixed to the bottom of chip cavity 62 withadhesive layer 42 and wire bonds 44 formed between bond pads 14 andattachment pads 66. FIGS. 22A-22C show that to complete the image sensorchip package assembly 50, chip cavity 62 is then filled with liquidsealant 76 to cover image sensor chips 4 and surround the edges of thetransparent covers 22 or 22′.

Although the invention herein has been described with reference toparticular embodiments, it is to be understood that these embodimentsare merely illustrative of the principles and applications of thepresent invention. It is therefore to be understood that numerousmodifications may be made to the illustrative embodiments and that otherarrangements may be devised without departing from the spirit and scopeof the present invention as defined by the appended claims.

1. A method of forming package assemblies, the method comprising:providing a substrate comprising at least a layer of semiconductormaterial having a plurality of optically interactive devices on asurface thereof, wherein each optically interactive device comprises animage sensitive area and at least one bond pad outside a peripheral edgeof the image sensitive area; bonding a transparent cover to the frontsurface of the substrate over the plurality of optically interactivedevices; sectioning the transparent cover outside the peripheral edge ofthe image sensitive area of each optically interactive device to exposethe at least one bond pad of each optically interactive device; cuttingthe substrate to mutually separate the plurality of opticallyinteractive devices; attaching at least some of the plurality ofoptically interactive devices to a surface of an interposer; andelectrically connecting the at least one bond pad of each opticallyinteractive device to at least one attachment pad of a plurality ofattachment pads on the surface of the interposer.
 2. The method of claim1, wherein bonding the transparent cover to the surface of the substratecomprises applying an adhesive material to at least one of the surfaceof the substrate and the transparent cover to cause the adhesivematerial to lie between the peripheral edge of the image sensitive areaand the at least one bond pad of each optically interactive device. 3.The method of claim 1, wherein bonding the transparent cover to thesurface of the substrate comprises applying an adhesive material to atleast one of the surface of the substrate and the transparent cover tocause the adhesive material to surround the peripheral edge of the imagesensitive area and cover the at least one bond pad of each opticallyinteractive device.
 4. The method of claim 1, further comprising:forming a layer of encapsulant material over the surface of theinterposer to cover the plurality of optically interactive devices,while leaving substantially exposed the portion of the transparent coverremaining over the image sensitive area of each optically interactivedevice; and cutting the interposer and the layer of encapsulant materialat locations between the plurality of optically interactive devices toform a plurality of individual package assemblies.
 5. The method ofclaim 4, wherein sectioning the transparent cover outside the peripheraledge of the image sensitive area of each optically interactive devicecomprises cutting the transparent cover with a saw.
 6. The method ofclaim 4, wherein cutting the transparent cover with a saw comprisescutting with a saw blade having a width that is substantially equal to adistance between the image sensitive areas of the plurality of opticallyinteractive devices.
 7. The method of claim 4, wherein cutting thetransparent cover with a saw comprises: cutting along the peripheraledges of image sensitive areas of a first row of optically interactivedevices; and cutting along the peripheral edges of image sensitive areasof a second, adjacent row of optically interactive devices.
 8. Themethod of claim 4, wherein cutting the transparent cover with a sawcomprises cutting a channel in the transparent cover between a first rowof optically interactive devices and a second row of opticallyinteractive devices, and further comprising: removing a portion of thetransparent cover and a portion of adhesive material adjacent to thechannel with an etching process.
 9. The method of claim 4, furthercomprising: removing a layer of semiconductor material from another,opposing surface of the substrate prior to sectioning the transparentcover.
 10. The method of claim 1, further comprising providing theinterposer with a plurality of external connection points on another,opposing surface thereof, and further comprising: forming a discreteconductive element on each external connection point of the plurality ofexternal connection points.
 11. The method of claim 1, wherein attachingthe plurality of optically interactive devices to the surface of theinterposer comprises attaching each optically interactive device with alayer of adhesive material.
 12. The method of claim 4, wherein formingthe layer of encapsulant material over the surface of the interposercomprises applying the encapsulant material by one of a transfer moldingprocess, a pot molding process, an injection molding process, a liquiddispensing process, a photolithographic deposition process, and astereolithographic deposition process.
 13. The method of claim 4,wherein the encapsulant material is selected to comprise one of asilicon-filled polymer and a liquid crystal polymer.
 14. The method ofclaim 1, wherein the plurality of optically interactive devices isselected to comprise a plurality of image sensor chips.
 15. The methodof claim 1, wherein electrically connecting the at least one bond pad ofeach optically interactive device to at least one attachment padcomprises forming a wire bond between the at least one bond pad of eachoptically interactive device and the at least one attachment pad. 16.The method of claim 4, further comprising: forming at least oneconductive trace on each optically interactive device after cutting thesubstrate to mutually separate the plurality of optically interactivedevices, wherein the at least one conductive trace extends from at leastone bond pad on a surface of each optically interactive device toanother, opposing surface of the optically interactive device; andforming a conductive bump on the at least one conductive trace of eachoptically interactive device on the another, opposing surface thereof.17. The method of claim 16, wherein attaching the plurality of opticallyinteractive devices to the surface of the interposer and electricallyconnecting the at least one bond pad of each optically interactivedevice to at least one attachment pad comprises bonding the conductivebump on the at least one conductive trace of each optically interactivedevice to the at least one attachment pad.
 18. A method of formingpackage assemblies, the method comprising: providing a substratecomprising at least a layer of semiconductor material having a pluralityof optically interactive devices on a surface thereof, wherein eachoptically interactive device comprises an image sensitive area and atleast one conductive via extending from the surface of the substrate toanother, opposing surface of the substrate; bonding a transparent coverto the surface of the substrate over the plurality of opticallyinteractive devices; forming a conductive bump over the at least oneconductive via of each optically interactive device on the another,opposing surface of the substrate; cutting the substrate and thetransparent cover to mutually separate the plurality of opticallyinteractive devices; and attaching at least some of the plurality ofoptically interactive devices to a surface of an interposer by bondingthe conductive bump over the at least one conductive via of eachoptically interactive device to an attachment pad of a plurality ofattachment pads on the surface of the interposer.
 19. The method ofclaim 18, wherein bonding a transparent cover to the surface of thesubstrate comprises applying an adhesive material to at least one of thesurface of the substrate and the transparent cover to cause the adhesivematerial to cover the surface of the substrate, while leaving exposedthe image sensitive area of each optically interactive device.
 20. Themethod of claim 18, further comprising: forming a layer of encapsulantmaterial over the surface of the interposer to cover the plurality ofoptically interactive devices, while leaving substantially exposed thetransparent cover remaining over the image sensitive area of eachoptically interactive device; and cutting the interposer and the layerof encapsulant material at locations between the plurality of opticallyinteractive devices to form a plurality of individual packageassemblies.
 21. The method of claim 20, wherein cutting the substrateand the transparent cover to separate the plurality of opticallyinteractive devices from one another comprises simultaneously cuttingthe substrate and the transparent cover with a saw.
 22. The method ofclaim 18, further comprising: removing a layer of semiconductor materialfrom the another, opposing surface of the substrate to expose the atleast one conductive via of each optically interactive device prior toforming a conductive bump over the at least one conductive via of eachoptically interactive device.
 23. The method of claim 18, wherein theinterposer has a plurality of external connection points on anothersurface thereof, and further comprising: forming a discrete conductiveelement on each external connection point of the plurality of externalconnection points.
 24. The method of claim 20, wherein forming the layerof encapsulant material over the surface of the interposer comprisesapplying the encapsulant material by one of a transfer molding process,a pot molding process, an injection molding process, a liquid dispensingprocess, a photolithographic deposition process, and astereolithographic deposition process.
 25. The method of claim 20,wherein the encapsulant material is selected to comprise one of asilicon-filled polymer and a liquid crystal polymer.
 26. The method ofclaim 18, wherein the plurality of optically interactive devices isselected to comprise a plurality of image sensor chips.
 27. A method offorming package assemblies, the method comprising: providing a substratecomprising at least a layer of semiconductor material having a pluralityof optically interactive devices on a surface thereof, wherein eachoptically interactive device comprises an image sensitive area and atleast one bond pad outside a peripheral edge of the image sensitivearea; cutting the substrate to mutually separate the plurality ofoptically interactive devices; attaching at least some of the pluralityof optically interactive devices to a surface of an interposer; forminga wire bond extending from the at least one bond pad of each opticallyinteractive device to at least one attachment pad of a plurality ofattachment pads on the surface of the interposer; and bonding atransparent cover to each optically interactive device with an adhesivematerial surrounding a peripheral edge of the image sensitive area ofeach optically interactive device and covering the at least one bond padof each optically interactive device.
 28. The method of claim 27,wherein the interposer has a plurality of external connection points onanother surface thereof, and further comprising: forming a discreteconductive element on each external connection point of the plurality ofexternal connection points.
 29. The method of claim 27, whereinattaching the plurality of optically interactive devices to the surfaceof the interposer comprises attaching each optically interactive devicewith a layer of adhesive material.
 30. The method of claim 27, furthercomprising: forming a layer of encapsulant material over the surface ofthe interposer to cover the plurality of optically interactive devices,while leaving substantially exposed the transparent cover on eachoptically interactive device; and cutting the interposer and the layerof encapsulant material at locations between the plurality of opticallyinteractive devices to form a plurality of individual packageassemblies.
 31. The method of claim 30, wherein forming the layer ofencapsulant material over the first surface of the interposer comprisesapplying the encapsulant material by one of a transfer molding process,a pot molding process, an injection molding process, a liquid dispensingprocess, a photolithographic deposition process, and astereolithographic deposition process.
 32. The method of claim 30,wherein the encapsulant material is selected to comprise one of asilicon-filled polymer and a liquid crystal polymer.
 33. The method ofclaim 27, wherein the plurality of optically interactive devices isselected to comprise a plurality of image sensor chips.
 34. A method offorming package assemblies, the method comprising: providing a substratecomprising at least a layer of semiconductor material having a pluralityof optically interactive devices on a surface thereof, wherein eachoptically interactive device comprises an image sensitive area; bondinga transparent cover to the front surface of the substrate over theplurality of optically interactive devices; sectioning the transparentcover outside the peripheral edge of the image sensitive area of eachoptically interactive device to leave a portion of the transparent coverover the image sensitive area of each optically interactive device;cutting the substrate to mutually separate the plurality of opticallyinteractive devices; attaching at least some of the plurality ofoptically interactive devices to a surface of an interposer;electrically connecting each optically interactive device to at leastone conductive pathway on the interposer; cutting the interposer atlocations between the plurality of optically interactive devices to forma plurality of individual package subassemblies; mounting at least oneindividual package subassembly of the plurality of individual packagesubassemblies within a cavity of a package housing; electricallyconnecting the at least one individual package subassembly to at leastone conductive pathway in the cavity of the package housing; and atleast partially filling the cavity of the package housing with a sealantmaterial.
 35. A method of forming package assemblies, the methodcomprising: providing a substrate comprising at least a layer ofsemiconductor material having a plurality of optically interactivedevices on a surface thereof, wherein each optically interactive devicecomprises an image sensitive area; bonding a transparent cover to thesurface of the substrate over the plurality of optically interactivedevices; sectioning the transparent cover outside the peripheral edge ofthe image sensitive area of each optically interactive device to leave aportion of the transparent cover over the image sensitive area of eachoptically interactive device; cutting the substrate to mutually separatethe plurality of optically interactive devices; mounting at least oneoptically interactive device of the plurality of optically interactivedevices within a cavity of a package housing; electrically connectingthe at least one optically interactive device to at least one conductivepathway in the cavity of the package housing; and at least partiallyfilling the cavity of the preformed package housing with a sealantmaterial.
 36. An electronic device package assembly, comprising: aninterposer having at least one conductive pathway including anattachment pad on a surface thereof; an optically interactive devicemounted to the interposer and having a surface with an image sensitivearea and at least one bond pad outside the image sensitive area; atransparent cover bonded over the image sensitive area to the surface ofthe optically interactive device between a peripheral edge of the imagesensitive area and the at least one bond pad; an electrical connectionbetween the at least one bond pad and the attachment pad of the at leastone conductive pathway of the interposer wherein the electricalconnection comprises a conductive trace extending from the at least onebond pad on the surface of the optically interactive device to another,opposing surface of the optically interactive device; and a layer ofencapsulant material over the surface of the interposer partiallycovering the optically interactive device and leaving the transparentcover substantially exposed.
 37. The electronic device package assemblyof claim 36, wherein a peripheral edge of the transparent cover extendsbeyond the peripheral edge of the image sensitive area and short of theat least one bond pad of the optically interactive device.
 38. Theelectronic device package assembly of claim 36, wherein the at least oneconductive pathway of the interposer includes an external connectionpoint on another, opposing surface thereof.
 39. The electronic devicepackage assembly of claim 36, further comprising a discrete conductiveelement attached to the external connection point of the at least oneconductive pathway.
 40. The electronic device package of claim 36,wherein the optically interactive device is adhered to the interposer.41. The electronic device package of claim 36, wherein the encapsulantmaterial comprises one of a silicon-filled polymer and a liquid crystalpolymer.
 42. The electronic device package of claim 36, wherein theoptically interactive device comprises an image sensor chip.
 43. Theelectronic device package of claim 36, wherein the electrical connectionbetween the at least one bond pad of the optically interactive deviceand the attachment pad of the at least one conductive pathway of theinterposer comprises a wire bond.